The JK Flip Flop is the most widely used flip flop. It is considered to be a universal flip-flop circuit. The sequential operation of the JK Flip Flop is same as for the RS flip-flop with the same SET and RESET input. The difference is that the JK Flip Flop does not the invalid input states of the RS Latch (when S and R are both 1).The JK Flip Flop name has been kept on the inventor name of the circuit known as Jack Kilby. The basic symbol of the JK Flip Flop is shown below.
The basic NAND gate RS flip-flop suffers from two main problems. Firstly, the condition when S = 0 and R = 0 should be avoided. Secondly, if the state of S or R changes its state while the input which is enabled is high, the correct latching action does not occur. Thus to overcome these two problems of the RS Flip-Flop, the JK Flip Flop was designed.
The JK Flip Flop is basically a gated RS flip flop with the addition of the clock input circuitry. When both the inputs S and R are equal to logic “1”, the invalid condition takes place. Thus to prevent this invalid condition, a clock circuit is introduced. The JK Flip Flop has four possible input combinations because of the addition of the clocked input. The four inputs are “logic 1”, ‘logic 0”. “No change’ and “Toggle”.